1. Field of the Invention
This invention relates to the field of integrated circuits. More particularly, this invention relates to the control of the performance of integrated circuits, such as, for example, the control of clock frequency, supply voltage, circuit timings etc.
2. Description of the Prior Art
When an integrated circuit, such as a memory circuit, is designed, various performance parameters of that integrated circuit typically need to be selected by the designer. In the case of memory circuits, the designers use various margining methodologies during the design stage to set parameters such as, for example, the timing of the sense amplifiers. As process technology scales to smaller geometries, the variations between different instances of an integrated circuit become greater such that in order to ensure correct operation of worst-case bit cells and the like across a full range of process-voltage-temperature parameters, these design margins becoming increasingly large and impose a performance constraining limitation upon the integrated circuit, even if that particular integrated circuit would in fact be capable of much higher performance. These large margins to deal with increasing process variation result in a loss of frequency performance, increased power consumption and/or other performance reductions. In the case of the sense amplifier example within a memory circuit, the timing for the sense amplifier is chosen for a worst case bit cell performance and accordingly all the sense amplifiers are timed with that worst case timing irrespective of the particular instance of the integrated circuit memory being capable of higher performance.
Some previous approaches have adopted statistical simulations at the design stage to seek to mitigate these issues by reducing the design margins as much as practice without significantly degrading the yield. However, obtaining relevant statistical standard deviation data for different manufacturing environments is difficult making these approaches impractical. Furthermore, different failure mechanisms will tend to have fundamentally different statistical distributions and there is no single common statistical distribution of errors which will explain all failure mechanism. Furthermore, there is no easy and universally accepted methodology to integrate statistical information into margining methodology to obtain better margins.